On Thu, 24 Apr 2025 at 10:14, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Add definitions for XSPI core clock and Gigabit Ethernet PTP reference
> core clocks in the R9A09G047 CPG DT bindings header file.
>
> The clk_spi is modelled as a fixed divider clock with parent clk_spix2 and
> factor two as both parent and child share same gating bit.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in the shared renesas-r9a09g047-dt-binding-defs branch.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
