Hi Wolfram, On Thu, 10 Apr 2025 at 17:08, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > On Wed, 19 Mar 2025 at 12:03, Wolfram Sang > <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote: > > The external crystal can be a second clock input. It is needed for the > > SCMP counting method which allows using crystals different than 32768Hz. > > It is also needed for an upcoming SoC which only supports the SCMP > > method. > > > > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > > Thanks for your patch! > > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > > --- a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml > > +++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml > > @@ -33,10 +33,14 @@ properties: > > - const: pps > > > > clocks: > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 2 > > > > clock-names: > > - const: hclk > > + minItems: 1 > > + items: > > + - const: hclk > > + - const: xtal > > Shouldn't the second clock become required? Or do you plan to make > that change after all upstream DTS files have been updated? Upon second thought: this xtal clock is documented to be the "rtc" input to the RZ/N1 system controller[1], so it looks like the original idea was to obtain it through the system controller. Unfortunately the clock driver[2] does not use the rtc input clock, nor provides it to consumers. So either we fix that, or we go with your solution... [1] https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml#L32 [2] https://elixir.bootlin.com/linux/latest/source/drivers/clk/renesas/r9a06g032-clocks.c Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
