Hi Wolfram,
On Wed, 19 Mar 2025 at 12:04, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> When using the SCMP mode instead of SUBU, this RTC can also support
> other input frequencies than 32768Hz. Also, upcoming SoCs will only
> support SCMP.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Suggestions for improvement below...
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
> @@ -404,10 +405,24 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
> if (ret < 0)
> return ret;
>
> - /*
> - * Ensure the clock counter is enabled.
> - * Set 24-hour mode and possible oscillator offset compensation in SUBU mode.
> - */
> + /* Only switch to scmp if we have an xtal clock with a valid rate and != 32768 */
> + xtal = devm_clk_get_optional(&pdev->dev, "xtal");
> + if (IS_ERR(xtal)) {
> + ret = PTR_ERR(xtal);
> + goto dis_runtime_pm;
> + } else if (xtal) {
> + rate = clk_get_rate(xtal);
> +
> + if (rate < 32000 || rate > BIT(22)) {
Perhaps
#define RTCA0SCMP_MIN 32000
#define RTCA0SCMP_MASK GEN_MASK(21. 0)
and
if (rate < RTCA0SCMP_MIN || rate > FIELD_MAX(RTCA0SCMP_MASK) + 1)
?
> + ret = -EOPNOTSUPP;
> + goto dis_runtime_pm;
> + }
> +
> + if (rate != 32768)
> + use_scmp = RZN1_RTC_CTL0_SLSB_SCMP;
> + }
> +
> + /* Disable controller during SUBU/SCMP setup */
> val = readl(rtc->base + RZN1_RTC_CTL0) & ~RZN1_RTC_CTL0_CE;
> writel(val, rtc->base + RZN1_RTC_CTL0);
> /* Wait 2-4 32k clock cycles for the disabled controller */
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
