Re: [PATCH v2 3/4] arm64: dts: renesas: Add R8A78000 X5H DTs

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Hi Morimoto-san,

CC maz

On Fri, 12 Sept 2025 at 02:39, Kuninori Morimoto
<kuninori.morimoto.gx@xxxxxxxxxxx> wrote:
> > > +               /* The Arm GIC-700AE - View 1 */
> >
> > s/700/720/
>
> Oops, thanks. Will fix
>
> > > +               gic: interrupt-controller@39000000 {
> > > +                       compatible = "arm,gic-v3";
> >
> > The documentation states it is compliant with GICv4.1?
>
> I'm not familiar with GIC. And I think there is no v4 support on Linux yet ?
> If my understanding was correct, GICv4 have GICv3 compatible.
> We can use v3 driver so far, and can be replaced to v4 driver if it was
> supported in Linux?

'git grep -i "\<gic.*v4.1"' does show support.

Marc?

> > > +                       #interrupt-cells = <3>;
> > > +                       #address-cells = <0>;
> > > +                       interrupt-controller;
> > > +                       redistributor-stride = <0x0 0x40000>;
> > > +                       #redistributor-regions = <32>;
> > > +                       reg = <0 0x39000000 0 0x20000>, // GICD
> >
> > The base address is 0x38000000, according to the docs?
>
> It is indicated in very deep place in datasheet. I will indicate
> detail in v2.
>
> > > +                             <0 0x397C0000 0 0x40000>, // GICR Core29
> > > +                             <0 0x39800000 0 0x40000>, // GICR Core30
> > > +                             <0 0x39840000 0 0x40000>; // GICR Core31
> >
> > No GICC, GICH, and GICV?
>
> will be added later ?

OK.

> > > +               scif0: serial@c0700000 {
> > > +                       compatible = "renesas,rcar-gen5-scif", "renesas,scif";
> >
> > Missing "renesas,scif-r8a78000" (everywhere)
> > ("make dtbs_check" would have told you).
>
> Grr, thank you for pointing it. will fix
>
> > > +                       reg = <0 0xc0700000 0 0x40>;
> > > +                       interrupts = <GIC_SPI 4074 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>;
> > > +                       clock-names = "fck", "brg_int", "scif_clk";
> >
> > "fck" on SCIF should be (derived from) SGASYNCD16 (66.666 MHz).
> (snip)
> > "fck" on HSCIF should be (derived from) SGASYNCD8 (133.33 MHz).
>
> In the early phase, there is no clock control support, so assume that
> the clocks are enabled by default. Therefore, dummy clocks are used.
> But indeed the naming seems strange. Will use just "dummy-clk".

I know.  But currently the clock rate for the dummy "fck" clocks does
not match reality.  As the SCIF driver tries hard to find the best
clock and divider for the requested transfer rate, it might pick "fck",
breaking serial communication.
So please add dummy clocks for SGASYNCD16 and SGASYNCD8, and use them as
"fck" clocks for SCIF resp. HSCIF.

> > According to the DT bindings, "power-domains" and "resets" are missing.
>
> Unfortunately, can't use for now. It needs SCP support but is under
> development. How should I do in this case ? Maybe use dummy device,
> but can we use it ??

Just leave them out for now, but be prepared to receive complaints
from the dtbs_check bots ;-)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds




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