On Wed, 6 Aug 2025 at 21:56, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> The RZ/G3E pin controller does not advertise PIN_CFG_OEN capability, so
> there is no valid mapping for output-enable bits on this SoC. Remove the
> oen_read and oen_write callbacks from the RZ/G3E driver data to defer
> OEN support until PIN_CFG_OEN support is added.
>
> This is a preparatory change for future unification of OEN handling across
> the driver.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> v2->v3:
> - Added Reviewed-by tag from Geert.
Thanks, will queue in renesas-pinctrl for v6.18.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
