On Wed, 6 Aug 2025 at 21:56, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Prepare for supporting SoCs with varying OEN register locations by
> parameterizing the OEN offset in the rzg2l driver. Introduce an `oen`
> field in the rzg2l_register_offsets structure and update rzg2l_read_oen(),
> rzg2l_write_oen(), suspend/resume caching, and SoC hwcfg entries to use
> this offset instead of the hard-coded ETH_MODE value.
>
> As part of this change, rename the field `eth_mode` in the register cache
> to `oen` to better reflect its general purpose and decouple the naming
> from a specific register.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> v2->v3:
> - Renamed `eth_mode` to `oen` in the rzg2l_pinctrl_reg_cache struct
> - Added a if condition to check if the OEN register offset is defined
> before reading/writing it in suspend/resume functions
> - Updated commit message
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-pinctrl for v6.18.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
