On 8/16/25 20:29, Sam Protsenko wrote: > On Fri, Aug 15, 2025 at 2:05 AM Ivaylo Ivanov > <ivo.ivanov.ivanov1@xxxxxxxxx> wrote: >> Hey, folks! >> >> This patchset adds serial busses, implemented in usi, for exynos2200. >> It's missing spi, due to me having troubles with reads when testing. >> Serial_0/1 have not been included in the patchset, as it seems like >> they're encapsulated in usi blocks, but are the only implemented >> protocol and/or do not have a dedicated register for setting other >> protocols in a sysreg. That'd at least require patches in the usi >> driver and bindings to add support for. >> >> About the naming convention for usi nodes, I've chosen to keep the >> downstream one instead of relabelling all to avoid confusion when >> cross-referencing the vendor DT and to keep consistency with clock >> names. They're labelled the same in the bootloader too. >> >> Best regards, >> Ivaylo >> >> Changes in v3: >> - drop the serial_0/1 patch > Why did you decide to drop it? As I understand, having a serial > console enabled can be quite valuable for this platform bring up. On the only board that is supported (g0s), serial can either be accessed via a special usb-c cable, whose way of working only Samsung knows, or soldering to uart pads on a tiny masked jtag (?) connector on the motherboard. The latter I'm not sure exists, as I haven't checked on g0s. (it does on dreamlte). Using uart is not really viable for debugging, framebuffer/usb work too :) > If you don't know how to add the related USI node -- it's ok, can be done > later, as soon as the serial works without it. I can't test that. On dreamlte a similar scenario exists, however usiv1 does not require the clock gating code, so not encapsulating it in a USI node is fine. Not sure about g0s, however. Best regards, Ivaylo > >> - add r-b tags from Sam >> - increase the size of all syscon to 0x10000 and not 0x3000 >> - change description of last patch to be more meaningful regarding the >> usiN and usiN_i2c mess >> - s/usi6_i2c_cmgp/usi_i2c_cmgp6, following the TRM naming convention >> >> Changes in v2: >> - add a patch that switches address and size cells to 1 in /soc >> - adjust all new nodes to define reg props with 2 cells in total instead of 4 >> >> Ivaylo Ivanov (4): >> arm64: dts: exynos2200: fix typo in hsi2c23 bus pins label >> arm64: dts: exynos2200: use 32-bit address space for /soc >> arm64: dts: exynos2200: increase the size of all syscons >> arm64: dts: exynos2200: define all usi nodes >> >> .../boot/dts/exynos/exynos2200-pinctrl.dtsi | 2 +- >> arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1433 ++++++++++++++++- >> 2 files changed, 1398 insertions(+), 37 deletions(-) >> >> -- >> 2.43.0 >> >>
