On 8/20/25 10:39 PM, Bharat Uppal wrote:
On FSD platform, gating the reference clock (ref_clk) and putting the UFS device in reset by asserting the reset signal during UFS suspend, improves the power savings and ensures the PHY is fully turned off. These operations are added as FSD specific suspend hook to avoid unintended side effects on other SoCs supported by this driver.
Reviewed-by: Bart Van Assche <bvanassche@xxxxxxx>
