On 11/08/2025 17:46, Shradha Todi wrote:
> Add the support for PCIe controller driver and phy driver for Tesla FSD.
> It includes support for both RC and EP.
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@xxxxxxxxxxx>
> Signed-off-by: Shradha Todi <shradha.t@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/tesla/fsd-evb.dts | 34 +++++
> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 65 +++++++++
> arch/arm64/boot/dts/tesla/fsd.dtsi | 147 +++++++++++++++++++++
> 3 files changed, 246 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 9ff22e1c8723..1b63c5d72d19 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -130,3 +130,37 @@ &serial_0 {
> &ufs {
> status = "okay";
> };
> +
> +&pcierc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie1_clkreq>, <&pcie1_wake>, <&pcie1_preset>,
> + <&pcie0_slot1>;
> +};
> +
> +&pcieep2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie1_clkreq>, <&pcie1_wake>, <&pcie1_preset>,
> + <&pcie0_slot1>;
> +};
> +
> +&pcierc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_clkreq>, <&pcie0_wake0>, <&pcie0_preset0>,
> + <&pcie0_slot0>;
> +};
> +
> +&pcieep0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_clkreq>, <&pcie0_wake0>, <&pcie0_preset0>,
> + <&pcie0_slot0>;
> +};
> +
> +&pcierc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_clkreq>, <&pcie0_wake1>, <&pcie0_preset0>;
> +};
> +
> +&pcieep1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_clkreq>, <&pcie0_wake1>, <&pcie0_preset0>;
All these are pointless, because the node is disabled. The board level
should be complete, so also supplies and enabling the device.
Best regards,
Krzysztof
