FSD platform has three instances of DesignWare based PCIe IP, one is in FSYS0 block and other two in FSYS1 block. This patch series add required DT binding, DT file modifications, Controller driver support and PHY driver support for the same. To keep single PCIe controller driver and PHY driver for all Samsung manufactured SoC, we have made changes to Exynos files to extend support for FSD platform and other Samsung manufactured SoCs which shall be upstreamed soon. First a version was posted as a separate driver file: https://lore.kernel.org/lkml/20221121105210.68596-1-shradha.t@xxxxxxxxxxx/ This was rejected and request was made to add the support in exynos file itself. Then another patchset was posted to refactor existing exynos file: https://lore.kernel.org/lkml/649a8d88-0504-5aa9-d167-d25d394f3f26@xxxxxxxxxx/T/ This requested some major changes Taking both these reviews into consideration, I have posted a fresh patchset where both changes to exynos framework and addition of new FSD support is present. v3: - Made separate DT bindings for Exynos5433 and FSD platforms as not much is shared - Moved all common changes to separate patch for controller and PHY and added FSD related changes on top - Removed alias method of differentiating between instances of PHY and added two separate compatibles. - Fixed smatch issues pointed out by Dan and other styling issues. v2: https://lore.kernel.org/all/20250625165229.3458-1-shradha.t@xxxxxxxxxxx/ - Reordered patches for removing unused MACROs and renaming them - Fixed all incomplete DT bindings - Modified PHY driver code to adopt better design - Removed patch to add alignment data in PCI endpoint test driver - Added dts changes in the patchset itself v1: https://lore.kernel.org/lkml/20250518193152.63476-1-shradha.t@xxxxxxxxxxx/ *** BLURB HERE *** Shradha Todi (12): PCI: exynos: Remove unused MACROs in exynos PCIe file PCI: exynos: Change macro names to exynos specific PCI: exynos: Reorder MACROs to maintain consistency PCI: exynos: Add platform device private data PCI: exynos: Add resource ops, soc variant and device mode dt-bindings: PCI: Split exynos host into two files dt-bindings: PCI: Add support for Tesla FSD SoC dt-bindings: phy: Add PCIe PHY support for FSD SoC phy: exynos: Add platform device private data phy: exynos: Add PCIe PHY support for FSD SoC PCI: exynos: Add support for Tesla FSD SoC arm64: dts: fsd: Add PCIe support for Tesla FSD SoC .../bindings/pci/samsung,exynos-pcie.yaml | 70 +-- .../bindings/pci/samsung,exynos5433-pcie.yaml | 89 +++ .../bindings/pci/tesla,fsd-pcie-ep.yaml | 91 +++ .../bindings/pci/tesla,fsd-pcie.yaml | 77 +++ .../bindings/phy/samsung,exynos-pcie-phy.yaml | 27 +- arch/arm64/boot/dts/tesla/fsd-evb.dts | 34 ++ arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 65 ++ arch/arm64/boot/dts/tesla/fsd.dtsi | 147 +++++ drivers/pci/controller/dwc/pci-exynos.c | 567 +++++++++++++++--- drivers/phy/samsung/phy-exynos-pcie.c | 295 ++++++++- 10 files changed, 1300 insertions(+), 162 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos5433-pcie.yaml create mode 100644 Documentation/devicetree/bindings/pci/tesla,fsd-pcie-ep.yaml create mode 100644 Documentation/devicetree/bindings/pci/tesla,fsd-pcie.yaml -- 2.49.0
