Hi Daniel,
Thanks for your patch!
> From: Daniel Scally <dan.scally@xxxxxxxxxxxxxxxx>
> Sent: 06 May 2025 13:13
> Subject: [PATCH 4/4] clk: renesas: r9a09g057-cpg: Add reset definitions for RZ/V2H ISP
>
> From: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx>
>
> Add reset line definitions for the ISP of the RZ/V2H SoC
>
> Signed-off-by: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx>
> ---
> drivers/clk/renesas/r9a09g057-cpg.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
> index cb001ae5f98b..6537654bbdfb 100644
> --- a/drivers/clk/renesas/r9a09g057-cpg.c
> +++ b/drivers/clk/renesas/r9a09g057-cpg.c
> @@ -298,6 +298,10 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
> DEF_RST(12, 14, 5, 31), /* CRU_3_PRESETN */
> DEF_RST(12, 15, 6, 0), /* CRU_3_ARESETN */
> DEF_RST(13, 0, 6, 1), /* CRU_3_S_RESETN */
> + DEF_RST(13, 1, 6, 2), /* ISP_0_VIN_ARESETN */
> + DEF_RST(13, 2, 6, 3), /* ISP_0_REG_ARESETN */
> + DEF_RST(13, 3, 6, 4), /* ISP_0_ISP_SRESETN */
> + DEF_RST(13, 4, 6, 5), /* ISP_0_PRESETN */
The numbers LGTM, but I think these changes belong with patch number 2.
Cheers,
Fab
> };
>
> const struct rzv2h_cpg_info r9a09g057_cpg_info __initconst = {
> --
> 2.34.1
>
