Hi Wolfram, On Thu, May 1, 2025 at 8:44 PM Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote: > > > > From 10µs to 50µs, the clock pulses are part of the recovery sequence. > > Ahh, that explains. I thought this was all after the recovery. > > > Around 55µs, the transfer function starts attempting to send data > > hence the clock pulse. > > The short SCL spike around 55us is still strange. However, we might > violate t:buf time between STOP and START. Can you please try the > attached WIP patch? > I'm seeing the same behaviour as seen previously (attached is the capture). > > The slave device is versa clock geberator 5P35023 (exact part number > > on SMARC RZ/G2L 5P35023B-629NLGI) > > Hmm, G3S has a versa clock generator as well. But I can't find a way to > wire GPIO lines to RIIC1 or I2C_PM. > Yes, same here apart from soldering the pins there seems to be no option. Cheers, Prabhakar
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