Hi Geert,
Thank you for the review.
On Thu, Apr 10, 2025 at 1:07 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Mon, 7 Apr 2025 at 21:16, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Add the initial device tree for the Renesas RZ/V2N EVK board, based on
> > the R9A09G056N48 SoC. Enable basic board functionality, including:
> >
> > - Memory mapping (reserve the first 128MB for the secure area)
> > - Clock inputs (QEXTAL, RTXIN, AUDIO_EXTAL)
> > - PINCTRL configurations for peripherals
> > - Serial console (SCIF)
> > - SDHI1 with power control and UHS modes
> >
> > Update the Makefile to include the new DTB.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v1->v2
> > - Followed DTS coding style guidelines
>
> Thanks for the update!
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> i.e. will queue in renesas-devel for v6.16.
>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
>
> > +&pinctrl {
>
> > + sdhi1_pins: sd1 {
> > + sd1-dat-cmd {
> > + pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
> > + input-enable;
> > + renesas,output-impedance = <3>;
> > + slew-rate = <0>;
> > + };
> > +
> > + sd1-clk {
> > + pins = "SD1CLK";
> > + renesas,output-impedance = <3>;
> > + slew-rate = <0>;
> > + };
> > +
> > + sd1-cd {
> > + pinmux = <RZV2N_PORT_PINMUX(9, 4, 14)>; /* SD1_CD */
> > + };
>
> I will sort these subnodes while applying.
>
Thanks for taking care.
Cheers,
Prabhakar
