On Mon, 7 Apr 2025 at 21:16, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add documentation for the pin controller found on the Renesas RZ/V2N
> (R9A09G056) SoC. The RZ/V2N PFC differs slightly from the RZ/G2L family
> and is almost identical to the RZ/V2H(P) SoC, except that the RZ/V2H(P) SoC
> has an additional dedicated pin.
>
> To account for this, a SoC-specific compatible string,
> 'renesas,r9a09g056-pinctrl', is introduced for the RZ/V2N SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> v1->v2:
> - Dropped `renesas,r9a09g056-pinctrl.h` header file.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-pinctrl for v6.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
