On Fri, Mar 28, 2025 at 08:01:03PM +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Add definitions for USB2 PHY core clocks and Gigabit Ethernet PTP > reference core clocks in the R9A09G057 CPG bindings header file. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
