Re: [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus

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On 3/28/25 6:31 PM, Wolfram Sang wrote:

> Schematics mention a 24cs64 on the bus, but I definitely have only a
> 24c64. So, it is only mentioned as a comment.
> 
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> ---
>  .../dts/renesas/r9a06g032-rzn1d400-db.dts     | 44 +++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> index 31cdca3e623c..d50a1d91e968 100644
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -57,6 +57,44 @@ fixed-link {
>  	};
>  };
>  
> +&i2c2 {
> +	pinctrl-0 = <&pins_i2c2>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +	clock-frequency = <400000>;
[...]> +	/* Some revisions may have a 24cs64 at address 0x58 */
> +	eeprom@50 {

   So 0x58 or 0x50?

> +		compatible = "atmel,24c64";
> +		pagesize = <32>;
> +		reg = <0x50>;
> +	};
> +};
> +
>  &mii_conv4 {
>  	renesas,miic-input = <MIIC_SWITCH_PORTB>;
>  	status = "okay";
[...]

MBR, Sergey





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