On Wed, Aug 20, 2025 at 06:17:53PM +0100, Biju wrote: > From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > Document the Renesas RZ/G3E USB3.2 Gen2 Host Controller (a.k.a USB3HOST). > The USB3HOST is compliant with the Universal Serial Bus 3.2 Specification > Revision 1.0. > - Supports 1 downstream USB receptacles > - Number of SSP Gen2 or SS ports: 1 > - Number of HS or FS or LS ports: 1 > - Supports Super Speed Plus Gen2x1 (10 Gbps), Super Speed (5 Gbps), > High Speed (480 Mbps), Full Speed (12Mbps), and Low Speed (1.5 Mbps). > - Supports all transfer-types: Control, Bulk, Interrupt, Isochronous, and > these split-transactions. > - Supports Power Control and Over Current Detection. > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > --- > .../bindings/usb/renesas,rzg3e-xhci.yaml | 84 +++++++++++++++++++ > 1 file changed, 84 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml > > diff --git a/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml > new file mode 100644 > index 000000000000..2f73ea2e1e78 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml > @@ -0,0 +1,84 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/renesas,rzg3e-xhci.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/G3E USB 3.2 Gen2 Host controller > + > +maintainers: > + - Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > + Common USB and XHCI properties don't apply? > +properties: > + compatible: > + const: renesas,r9a09g047-xhci > + > + reg: > + maxItems: 1 > + > + interrupts: > + items: > + - description: Logical OR of all interrupt signals. > + - description: System management interrupt > + - description: Host system error interrupt > + - description: Power management event interrupt > + - description: xHC interrupt > + > + interrupt-names: > + items: > + - const: all > + - const: smi > + - const: hse > + - const: pme > + - const: xhc > + > + clocks: > + maxItems: 1 > + > + phys: > + maxItems: 2 > + > + phy-names: > + items: > + - const: usb2-phy > + - const: usb3-phy > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-names > + - clocks > + - power-domains > + - resets > + - phys > + - phy-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/renesas,r9a09g047-cpg.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + usb@15850000 { > + compatible = "renesas,r9a09g047-xhci"; > + reg = <0x15850000 0x10000>; > + interrupts = <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "all", "smi", "hse", "pme", "xhc"; > + clocks = <&cpg CPG_MOD 0xaf>; > + power-domains = <&cpg>; > + resets = <&cpg 0xaa>; > + phys = <&usb3_phy>, <&usb3_phy>; > + phy-names = "usb2-phy", "usb3-phy"; > + }; > -- > 2.43.0 >
