Hi Mike, Stephen,
The following changes since commit f63aaf6e71de897954fbde4e4a17a9dcdbe5e7e1:
clk: renesas: mstp: Add genpd OF provider at postcore_initcall() (2025-08-18 09:36:55 +0200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.18-tag1
for you to fetch changes up to 6bbf77bb22565332744c74e9806f8fb50402d73e:
clk: renesas: r9a09g047: Add GPT clocks and resets (2025-08-25 15:57:49 +0200)
----------------------------------------------------------------
clk: renesas: Updates for v6.18
- Add USB and remaining serial (SCI) clocks and resets on RZ/T2H and
RZ/N2H,
- Add I3C and PCIe clocks and resets on RZ/G3S,
- Add DMAC and PWM (GPT) clocks and resets on RZ/G3E,
- Add Module Stop (MSTOP) support on RZ/G2L and RZ/G2UL,
- Convert from round_rate() to determine_rate(),
- Miscellaneous fixes and improvements.
Note that:
1. This is based on renesas-clk-fixes-for-v6.17-tag1, which you
have not pulled yet,
2. This includes DT binding definition updates for the RZ/T2H and
RZ/N2H SoCs, which are shared by clock driver, pin control driver,
and DT source files.
Thanks for pulling!
----------------------------------------------------------------
Biju Das (1):
clk: renesas: r9a09g047: Add GPT clocks and resets
Brian Masney (2):
clk: renesas: rzg2l: convert from round_rate() to determine_rate()
clk: renesas: rzv2h: remove round_rate() in favor of determine_rate()
Claudiu Beznea (5):
clk: renesas: r9a08g045: Add PCIe clocks and resets
clk: renesas: r9a08g045: Add MSTOP for GPIO
clk: renesas: r9a07g044: Add MSTOP for RZ/G2L
clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL
clk: renesas: r9a07g04[34]: Use tabs instead of spaces
Geert Uytterhoeven (1):
Merge tag 'renesas-r9a09g077-dt-binding-defs-tag3' into renesas-clk-for-v6.18
Lad Prabhakar (4):
dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
dt-bindings: pinctrl: renesas: Document RZ/T2H and RZ/N2H SoCs
clk: renesas: r9a09g077: Add USB core and module clocks
clk: renesas: r9a09g077: Add module clocks for SCI1-SCI5
Tommaso Merciai (1):
clk: renesas: r9a09g047: Add DMAC clocks and resets
Wolfram Sang (1):
clk: renesas: r9a08g045: Add I3C clocks and resets
.../pinctrl/renesas,r9a09g077-pinctrl.yaml | 172 +++++++++++++++++++++
drivers/clk/renesas/r9a07g043-cpg.c | 140 ++++++++---------
drivers/clk/renesas/r9a07g044-cpg.c | 162 +++++++++----------
drivers/clk/renesas/r9a08g045-cpg.c | 29 +++-
drivers/clk/renesas/r9a09g047-cpg.c | 27 ++++
drivers/clk/renesas/r9a09g077-cpg.c | 29 +++-
drivers/clk/renesas/rzg2l-cpg.c | 9 +-
drivers/clk/renesas/rzg2l-cpg.h | 1 +
drivers/clk/renesas/rzv2h-cpg.c | 10 --
.../dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
.../dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
.../pinctrl/renesas,r9a09g077-pinctrl.h | 22 +++
12 files changed, 435 insertions(+), 168 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
create mode 100644 include/dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
