On Fri, 8 Aug 2025 at 15:30, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> The RZ/N2H (R9A09G087) SoC from Renesas shares a similar pin controller
> architecture with the RZ/T2H (R9A09G077) SoC, differing primarily in the
> number of supported pins-576 on RZ/N2H versus 729 on RZ/T2H.
>
> Add the necessary pin configuration data and compatible string to enable
> support for the RZ/N2H SoC in the RZ/T2H pinctrl driver.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> v4->v5:
> - Dropped updating Kconfig help string as that was done in patch 2/3
> - Used 0xXX for consistent formatting in r9a09g087_gpio_configs
> - Added reviewed-by tag from Geert
Thanks, will queue in renesas-pinctrl for v6.18.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
