Re: [PATCH] arm64: dts: renesas: r8a779g3: Update thermal trip points on V4H Sparrow Hawk

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On 8/6/25 11:35 AM, Geert Uytterhoeven wrote:
Hi Marek,

Hi,

+       #cooling-cells = <2>;

This is only present for the first CPU core, and map{0,1,3} refer
only to a76_0, because all four CPU cores are driven by a single clock
(Z0), right?

That seems correct.

+
+       a76_0_thermal_idle: thermal-idle {
+               #cooling-cells = <2>;
+               duration-us = <10000>;
+               exit-latency-us = <500>;
+       };
+};

+/* THS sensor in SoC near CA76 cores does more progressive cooling. */
+&sensor_thermal_ca76 {
+       critical-action = "shutdown";
+
+       cooling-maps {
+               /*
+                * The cooling-device minimum and maximum parameters inversely
+                * match opp-table-0 {} node entries in r8a779g0.dtsi, in other
+                * words, 0 refers to 1.8 GHz OPP and 4 refers to 500 MHz OPP.
+                * This is because they refer to cooling levels, where maximum
+                * cooling level happens at 500 MHz OPP, when the CPU core is
+                * running slowly and therefore generates least heat.

That applies to cooling-device = <&a76_[0-3] ...>...

Do you want me to add this line into the comment ?

+                */
+               map0 {
+                       /* At 68C, inhibit 1.7 GHz and 1.8 GHz modes */
+                       trip = <&sensor3_passive_low>;
+                       cooling-device = <&a76_0 2 4>;
+                       contribution = <128>;
+               };
+
+               map1 {
+                       /* At 72C, inhibit 1.5 GHz mode */
+                       trip = <&sensor3_passive_mid>;
+                       cooling-device = <&a76_0 3 4>;
+                       contribution = <256>;
+               };
+
+               map2 {
+                       /* At 76C, start injecting idle states */
+                       trip = <&sensor3_passive_hi>;
+                       cooling-device = <&a76_0_thermal_idle 0 80>,
+                                        <&a76_1_thermal_idle 0 80>,
+                                        <&a76_2_thermal_idle 0 80>,
+                                        <&a76_3_thermal_idle 0 80>;

... but what do "0 80" refer to? I couldn't find in the thermal-idle
bindings what exactly are the minimum and maximum cooling states here.
The comments in drivers/thermal/cpuidle_cooling.c clarify that, it is the idle injection rate in percent, in this case the cooling can inject idle states up to 80% of time.

+CC Daniel in case they want to chime in on that.




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