On Mon, Aug 04, 2025 at 09:26:42PM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077) > and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for > USB PHY layer. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > --- > include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 + > include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 + > 2 files changed, 2 insertions(+) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
