Hi Rob, On Tue, 29 Jul 2025 13:11:51 -0500 Rob Herring <robh@xxxxxxxxxx> wrote: > On Fri, Jul 25, 2025 at 05:26:10PM +0200, Herve Codina wrote: > > The RZ/N1 SoCs uses the Synopsys DesignWare IP to handle GPIO blocks. > > > > Add RZ/N1 SoC and family compatible strings. > > Why? Yes, that's policy, but so far we avoided it on this IP. Perhaps > because it is simple enough. So what's different here? I've just followed Renesas policy. Nothing other than this policy justifies the change and so, I can remove the Renesas compatible strings. In other words, I can simply remove this patch. Best regards, Hervé
