On Fri, 4 Jul 2025 at 15:43, Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> If MSTOP is not added for both clocks in a coupled pair, and the clocks
> are not disabled in the reverse order of their enable sequence, the MSTOP
> may remain enabled when disabling the clocks.
>
> This happens because rzg2l_mod_clock_endisable() executes for coupled
> clocks only when a single clock from the pair is enabled. If one clock has
> no MSTOP defined, it can result in the MSTOP configuration being left
> active when the clocks are disabled out of order (i.e., not in the reverse
> order of enabling).
>
> Fixes: c49695952746 ("clk: renesas: r9a08g045: Drop power domain instantiation")
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk for v6.17.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
