On Thu, 19 Jun 2025 at 17:03, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Tue, 17 Jun 2025 at 17:58, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Add the Peripheral Module Clock L (PCLKL) core clock ID for the RZ/T2H
> > (R9A09G077) SoC. This clock is used by peripherals such as IIC, WDT,
> > and others.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v1->v2:
> > - New patch to add PCLKL core clock ID.
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> i.e. will queue in renesas-clk for v6.17.
Actually in renesas-r9a09g077-dt-binding-defs, which will be merged
in my clock and DTS branches.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
