From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Add the Peripheral Module Clock L (PCLKL) core clock ID for the RZ/T2H (R9A09G077) SoC. This clock is used by peripherals such as IIC, WDT, and others. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> --- v1->v2: - New patch to add PCLKL core clock ID. --- include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h index 1b22fe88dec7..f6e5f62b07c4 100644 --- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h @@ -23,5 +23,6 @@ #define R9A09G077_CLK_PCLKGPTL 11 #define R9A09G077_CLK_PCLKH 12 #define R9A09G077_CLK_PCLKM 13 +#define R9A09G077_CLK_PCLKL 14 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */ -- 2.49.0
