On Mon, May 19, 2025 at 01:01:45AM GMT, Shradha Todi wrote: > Exynos PCI file follows MACRO definition order where > register offset is defined in ascending order and each > bit field within the offset is defined right after offset > definition. Some MACROs are out of order and so reorder > those MACROs to maintain consistency. > > Suggested-by: Hrishikesh Dileep <hrishikesh.d@xxxxxxxxxxx> > Signed-off-by: Shradha Todi <shradha.t@xxxxxxxxxxx> > --- > drivers/pci/controller/dwc/pci-exynos.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c > index 990aaa16b132..286f4987d56f 100644 > --- a/drivers/pci/controller/dwc/pci-exynos.c > +++ b/drivers/pci/controller/dwc/pci-exynos.c > @@ -27,11 +27,11 @@ > > /* PCIe ELBI registers */ > #define EXYNOS_PCIE_IRQ_PULSE 0x000 > +#define EXYNOS_PCIE_IRQ_EN_PULSE 0x00c > #define EXYNOS_IRQ_INTA_ASSERT BIT(0) > #define EXYNOS_IRQ_INTB_ASSERT BIT(2) > #define EXYNOS_IRQ_INTC_ASSERT BIT(4) > #define EXYNOS_IRQ_INTD_ASSERT BIT(6) > -#define EXYNOS_PCIE_IRQ_EN_PULSE 0x00c > #define EXYNOS_PCIE_IRQ_EN_LEVEL 0x010 > #define EXYNOS_PCIE_IRQ_EN_SPECIAL 0x014 > #define EXYNOS_PCIE_SW_WAKE 0x018 > @@ -42,12 +42,12 @@ > #define EXYNOS_PCIE_NONSTICKY_RESET 0x024 > #define EXYNOS_PCIE_APP_INIT_RESET 0x028 > #define EXYNOS_PCIE_APP_LTSSM_ENABLE 0x02c > +#define EXYNOS_PCIE_ELBI_LTSSM_ENABLE 0x1 > #define EXYNOS_PCIE_ELBI_RDLH_LINKUP 0x074 > #define EXYNOS_PCIE_ELBI_XMLH_LINKUP BIT(4) > -#define EXYNOS_PCIE_ELBI_LTSSM_ENABLE 0x1 > #define EXYNOS_PCIE_ELBI_SLV_AWMISC 0x11c > #define EXYNOS_PCIE_ELBI_SLV_ARMISC 0x120 > -#define EXYNOS_PCIE_ELBI_SLV_DBI_ENABLE BIT(21) > +#define EXYNOS_PCIE_ELBI_SLV_DBI_ENABLE BIT(21) What changed here? Why you cannot fix indentation while renaming? Best regards, Krzysztof
