On 21/08/2025 14:32, Ravi Patel wrote:
> From: SungMin Park <smn1196@xxxxxxxxxx>
>
> Add initial device tree support for Axis ARTPEC-8 SoC.
>
> This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.
>
> Signed-off-by: SungMin Park <smn1196@xxxxxxxxxx>
> Signed-off-by: SeonGu Kang <ksk4725@xxxxxxxxxx>
> Signed-off-by: Ravi Patel <ravi.patel@xxxxxxxxxxx>
...
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
No CPU mask?
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
Best regards,
Krzysztof
