On 29/08/2025 12:15, Pritam Manohar Sutar wrote: > Hi Krzysztof > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx> >> Sent: 26 August 2025 02:05 PM >> To: Pritam Manohar Sutar <pritam.sutar@xxxxxxxxxxx> >> Cc: vkoul@xxxxxxxxxx; kishon@xxxxxxxxxx; robh@xxxxxxxxxx; > . > . > [snip] > . > . >>>> Subject: Re: [PATCH v7 5/6] dt-bindings: phy: samsung,usb3-drd-phy: >>>> add >>>> ExynosAutov920 combo ssphy >>>> >>>> On Fri, Aug 22, 2025 at 03:08:44PM +0530, Pritam Manohar Sutar wrote: >>>>> This phy supports USB3.1 SSP+(10Gbps) protocol and is backwards >>>>> compatible to the USB3.0 SS(5Gbps). It requires two clocks, named >>>>> "phy" and "ref". The required supplies for USB3.1 are named as >>>>> vdd075_usb30(0.75v), vdd18_usb30(1.8v). >>>> >>>> Please do not describe the schema, but hardware. This sentence does >>>> not help me in my question further. >>> >>> This is a combo phy having Synopsys usb20 and usb30 phys (these 2 phys are >> totally different). >>> One PHY only supports usb2.0 and data rates whereas another one does >>> usb3.1 ssp+ and usb3.1 ssp >>> >>> This patch only explains about usb30 (since these are two different phys) phy >> and omitted inclusion of usb20 reference (added separate patch for this patch >> no 3). >>> >>> Hope this is clear. >> >> No. That sentence still explains what schema is doing. >> > > Ok, let me simplify the commit message further something like below. > Anyways, the coverletter contains more details about it. > > "dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo ssphy > > Add schema for combo ssphy found on this SoC. > " > > Please confirm if this looks fine? > If so, will reflect the similar commit messages in patch 1 and 3. Please read my first comment again. I do not see how does this satisfy hardware explanation. Best regards, Krzysztof
