On Mon, Aug 11, 2025 at 09:16:34PM +0530, Shradha Todi wrote: > Since Tesla FSD SoC uses Samsung PCIe PHY, add support in > exynos PCIe PHY bindings. > > In Tesla FSD SoC, the two PHY instances, although having identical > hardware design and register maps, are placed in different locations > (Placement and routing) inside the SoC and have distinct > PHY-to-Controller topologies. (One instance is connected to two PCIe > controllers, while the other is connected to only one). As a result, > they experience different analog environments, including varying > channel losses and noise profiles. > > Since these PHYs lack internal adaptation mechanisms and f/w based > tuning, manual register programming is required for analog tuning. > To ensure optimal signal integrity, it is essential to use different > register values for each PHY instance, despite their identical hardware > design. This is because the same register values may not be suitable > for both instances due to their differing environments and topologies. Would be nice if above (or most of it) would be reflected in binding description. Please do so and: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
