Hi Thierry,
On Tue, 29 Apr 2025 at 10:20, Thierry Bultel
<thierry.bultel.yh@xxxxxxxxxxxxxx> wrote:
> Add the initial dtsi for the RZ/T2H Soc:
>
> - gic
> - armv8-timer
> - cpg clock
> - sci0 uart
>
> also add arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi, that keeps
> all 4 CPUs enabled, for consistency with later support of -m24
> and -m04 SoC revisions, that only have 2 and 1 Cortex-A55, respectively,
> and that will use /delete-node/ to disable the missing CPUs.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@xxxxxxxxxxxxxx>
> ---
> Changes v7->v8:
> - removed loco clock
> - added sci0 secondary clock
Thanks for your patch!
LGTM (modulo the comments on the RSCI and CPG bindings), so
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
