Hi Thierry,
On Tue, 13 May 2025 at 11:38, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Tue, 29 Apr 2025 at 10:20, Thierry Bultel
> <thierry.bultel.yh@xxxxxxxxxxxxxx> wrote:
> > At boot, the default clock is the PCLKM core lock (synchronous
> > clock, which is enabled by the bootloader).
> > For different baudrates, the asynchronous clock input must be used.
> > Clock selection is made by an internal register of RCSI.
> >
> > Signed-off-by: Thierry Bultel <thierry.bultel.yh@xxxxxxxxxxxxxx>
> > --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> > @@ -35,10 +35,14 @@ properties:
> > - const: tei
> >
> > clocks:
> > - maxItems: 1
> > + items:
> > + - description: serial functional clock
>
> The Hardware Manual calls this "operation clock".
>
> > + - description: default core clock
>
> The Hardware Manual calls this "bus clock".
>
> >
> > clock-names:
> > - const: fck # UART functional clock
> > + items:
> > + - const: async
>
> "async" is the name on the producer side, not the consumer side.
> "operation"?
>
> > + - const: bus
Actually there can be a third optional clock, just like on all other
variants except for SCIFA/SCIFB: the external SCK pin.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
