A new version of the data sheet suggest some additional register writes at the end of the initialization. Signed-off-by: Michael Dege <michael.dege@xxxxxxxxxxx> --- drivers/phy/renesas/renesas-ether-serdes.c | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/phy/renesas/renesas-ether-serdes.c b/drivers/phy/renesas/renesas-ether-serdes.c index af5f491cfab1..db6426a5fd1d 100644 --- a/drivers/phy/renesas/renesas-ether-serdes.c +++ b/drivers/phy/renesas/renesas-ether-serdes.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Renesas Ethernet SERDES device driver * - * Copyright (C) 2022 Renesas Electronics Corporation + * Copyright (C) 2022-2025 Renesas Electronics Corporation */ #include <linux/delay.h> @@ -18,6 +18,7 @@ #define RENESAS_ETH_SERDES_OFFSET 0x0400 #define RENESAS_ETH_SERDES_BANK_SELECT 0x03fc #define RENESAS_ETH_SERDES_TIMEOUT_US 100000 +#define RENESAS_ETH_SERDES_LOCAL_OFFSET 0x2600 #define RENESAS_ETH_SERDES_NUM_RETRY_LINKUP 3 struct renesas_eth_serdes_drv_data; @@ -49,6 +50,12 @@ static void renesas_eth_serdes_write32(void __iomem *addr, u32 offs, u32 bank, u iowrite32(data, addr + offs); } +static u32 renesas_eth_serdes_read32(void __iomem *addr, u32 offs, u32 bank) +{ + iowrite32(bank, addr + RENESAS_ETH_SERDES_BANK_SELECT); + return ioread32(addr + offs); +} + static int renesas_eth_serdes_reg_wait(struct renesas_eth_serdes_channel *channel, u32 offs, u32 bank, u32 mask, u32 expected) @@ -316,6 +323,7 @@ static int renesas_eth_serdes_hw_init_late(struct renesas_eth_serdes_channel *channel) { int ret; + u32 val; ret = renesas_eth_serdes_chan_setting(channel); if (ret) @@ -329,6 +337,26 @@ static int renesas_eth_serdes_hw_init_late(struct renesas_eth_serdes_channel renesas_eth_serdes_write32(channel->addr, 0x03d0, 0x380, 0x0000); + val = renesas_eth_serdes_read32(channel->addr, 0x00c0, 0x180); + renesas_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val | BIT(8)); + ret = renesas_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 1); + if (ret) + return ret; + renesas_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val &= ~BIT(8)); + ret = renesas_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 0); + if (ret) + return ret; + + val = renesas_eth_serdes_read32(channel->addr, 0x0144, 0x180); + renesas_eth_serdes_write32(channel->addr, 0x0144, 0x180, val | BIT(4)); + ret = renesas_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 1); + if (ret) + return ret; + renesas_eth_serdes_write32(channel->addr, 0x0144, 0x180, val &= ~BIT(4)); + ret = renesas_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 0); + if (ret) + return ret; + return renesas_eth_serdes_monitor_linkup(channel); } -- 2.34.1 ________________________________ Renesas Electronics Europe GmbH Registered Office: Arcadiastrasse 10 DE-40472 Duesseldorf Commercial Registry: Duesseldorf, HRB 3708 Managing Director: Carsten Jauch VAT-No.: DE 14978647 Tax-ID-No: 105/5839/1793 Legal Disclaimer: This e-mail communication (and any attachment/s) is confidential and contains proprietary information, some or all of which may be legally privileged. It is intended solely for the use of the individual or entity to which it is addressed. Access to this email by anyone else is unauthorized. If you are not the intended recipient, any disclosure, copying, distribution or any action taken or omitted to be taken in reliance on it, is prohibited and may be unlawful.