Hi Wolfram,
On Mon, 5 May 2025 at 22:27, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> > According to Sections 10.6.5.1 (1) ("Meanings of USB_OCI and USB_PPON
> > Signals") and Table 10.131 ("OCI and PPON") of the RZ/N1D System Control
> > and Peripheral Manual, USB_PPON2 and USB_OC2 are only used when both
> > ports are configured for host mode. When port 1 is configured for
> > function mode, port 2 uses USB_PPON1 and USB_OC1 instead, so you
> > shouldn't need pin control for USB_PPON2 and USB_OC2.
> > However, that does not match the schematics, which show that USB_PPON2
> > and USB_OC2 are wired to port 2's power switch.
> > Can you enlighten me?
>
> Both pins I enabled here are routed to the Config CPLD (check the DB
> datasheet, page 9). This handles the configuration and routes whatever
> is selected to the EB then. The pins on the EB are always named PPON2
> and OC2. Because these pins are always routed to the CPLD, I think it
> makes sense to have them described like this always. I didn't see
> another way to use them anyhow. It could be argued, though, that these
> pinmux properties belong to the DB, then. Maybe this makes more sense?
Oh, I totally missed that the markings "USB_{OC,PPON}[01]" next to
the "RZ_N1D_GPIO_1{19-22}" lines connected to the CPLD are merely
comments, and thus these lines are not physically connected to the
"USB_{OC,PPON}[01]" lines also connected to the CPLD.
So the CPLD takes care of the routing, based on the SETUP_SW<4>
setting. And I guess that setting should match the presence or absence
of a jumper on CN2, which controls OTG vs. Peri for USB1?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
