Hi Daniel, Thanks for your patch! > From: Daniel Scally <dan.scally@xxxxxxxxxxxxxxxx> > Sent: 06 May 2025 13:13 > Subject: [PATCH 3/4] dt-bindings: clock: Add macros for RZ/V2H ISP reset > > From: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx> > > Add macros for the RZ/V2H ISP resets so that they can be referred to > descriptively in the drivers. I don't think this patch is needed. Please have a look at the below file (more specifically, the descriptions for #clock-cells and #reset-cells) for further reference: Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml Cheers, Fab > > Signed-off-by: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx> > --- > include/dt-bindings/clock/renesas,r9a09g057-cpg.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/include/dt-bindings/clock/renesas,r9a09g057-cpg.h b/include/dt- > bindings/clock/renesas,r9a09g057-cpg.h > index cb2ccd9068db..958a2bd3e679 100644 > --- a/include/dt-bindings/clock/renesas,r9a09g057-cpg.h > +++ b/include/dt-bindings/clock/renesas,r9a09g057-cpg.h > @@ -22,4 +22,10 @@ > #define R9A09G057_ISP0_VIN_ACLK 228 > #define R9A09G057_ISP0_SCLK 229 > > +/* Reset Definitions */ > +#define R9A09G057_ISP_0_VIN_ARESETN 209 > +#define R9A09G057_ISP_0_REG_ARESETN 210 > +#define R9A09G057_ISP_0_ISP_SRESETN 211 > +#define R9A09G057_ISP_0_PRESETN 212 > + > #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */ > -- > 2.34.1 >
