On Mon, 7 Apr 2025 at 18:52, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Update the clock enable/disable logic to follow the latest hardware
> manual's guidelines, ensuring that both CLK_ON and CLK_MON bits are used to
> confirm the clock state.
>
> According to the manual, enabling a clock requires setting the CPG_CLK_ON
> bit and verifying the clock has started using the CPG_CLK_MON bit.
> Similarly, disabling a clock requires clearing the CPG_CLK_ON bit and
> confirming the clock has stopped via the CPG_CLK_MON bit.
>
> Modify `rzv2h_mod_clock_is_enabled()` to check CLK_MON first and then
> validate CLK_ON for a more accurate clock status evaluation.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk for v6.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
