> -----Original Message-----
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: 14 April 2025 16:51
> To: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Cc: Magnus Damm <magnus.damm@xxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski
> <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>;
> biju.das.au <biju.das.au@xxxxxxxxx>
> Subject: RE: [PATCH v2 2/3] arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD
>
> Hi Geert,
>
> Thanks for the feedback.
>
> > -----Original Message-----
> > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> > Sent: 14 April 2025 16:39
> > Subject: Re: [PATCH v2 2/3] arm64: dts: renesas: r9a09g047e57-smarc:
> > Enable CANFD
> >
> > Hi Biju,
> >
> > On Thu, 20 Mar 2025 at 17:41, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > > Enable CANFD on the RZ/G3E SMARC EVK platform.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > ---
> > > v1->v2:
> > > * Split the patch into two.
> > > * Enabling CANFD done in this patch and CAN Transceiver on next patch.
> > > * Defined the macros SW_LCD_EN and SW_PDM_EN which routes signals to
> > > CAN0 and CAN1 based on SYS.5 and BOOT.6 switches.
> >
> > Thanks for the update!
> >
> > > --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> > > +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> > > @@ -8,6 +8,8 @@
> > > /dts-v1/;
> > >
> > > /* Switch selection settings */
> > > +#define SW_LCD_EN 0
> > > +#define SW_PDM_EN 0
> > > #define SW_SD0_DEV_SEL 0
> > > #define SW_SDIO_M2E 0
> > >
> > > @@ -33,7 +35,36 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
> > > };
> > > };
> > >
> > > +&canfd {
> > > + pinctrl-0 = <&canfd_pins>;
> > > + pinctrl-names = "default";
> > > +
> > > +#if (!SW_PDM_EN)
> > > + channel1 {
> > > + status = "okay";
> > > + };
> > > +#endif
> > > +
> > > +#if (!SW_LCD_EN)
> > > + channel4 {
> > > + status = "okay";
> > > + };
> > > +#endif
> > > +};
> > > +
> > > &pinctrl {
> > > + canfd_pins: canfd {
> > > + can1_pins: can1 {
> > > + pinmux = <RZG3E_PORT_PINMUX(L, 2, 3)>, /* RX */
> > > + <RZG3E_PORT_PINMUX(L, 3, 3)>; /* TX */
> > > + };
> > > +
> > > + can4_pins: can4 {
> > > + pinmux = <RZG3E_PORT_PINMUX(5, 2, 3)>, /* RX */
> > > + <RZG3E_PORT_PINMUX(5, 3, 3)>; /* TX */
> > > + };
> > > + };
> > > +
> > > scif_pins: scif {
> > > pins = "SCIF_TXD", "SCIF_RXD";
> > > renesas,output-impedance = <1>; diff --git
> > > a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> > > b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> > > index fd82df8adc1e..1d3a844174b3 100644
> > > --- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> > > @@ -29,6 +29,10 @@ aliases {
> > > };
> > > };
> > >
> > > +&canfd {
> > > + status = "okay";
> > > +};
> >
> > I am wondering why you split this in two patches?
> > I believe CAN-FD does not work without adding the CAN transceivers,
> > which is only done in the next patch?
>
> STB pin is active high. If you see the schematic GPIO8 and GPIO9 are controlled through a switch.
>
> By default, they are set to GPIO8_PMOD and GPIO9_PMOD, meaning STB pins are pulled Down.
> So, with CAN transceiver driver still we can test CANFD.
Typo with->without.
Cheers,
Biju
