The "spin-table" enable-method requires "cpu-release-addr" property,
so add a dummy entry. It is assumed the bootloader will fill in the
correct values.
Signed-off-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
---
v2:
- Keep qcom,saw and qcom,acc properties
---
arch/arm64/boot/dts/qcom/msm8939.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi
index 7cd5660de1b3..72f01953e65c 100644
--- a/arch/arm64/boot/dts/qcom/msm8939.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi
@@ -46,6 +46,7 @@ cpu0: cpu@100 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x100>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc0>;
@@ -64,6 +65,7 @@ cpu1: cpu@101 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x101>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc1>;
@@ -77,6 +79,7 @@ cpu2: cpu@102 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x102>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc2>;
@@ -90,6 +93,7 @@ cpu3: cpu@103 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x103>;
next-level-cache = <&l2_1>;
qcom,acc = <&acc3>;
@@ -103,6 +107,7 @@ cpu4: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x0>;
qcom,acc = <&acc4>;
qcom,saw = <&saw4>;
@@ -121,6 +126,7 @@ cpu5: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x1>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc5>;
@@ -134,6 +140,7 @@ cpu6: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x2>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc6>;
@@ -147,6 +154,7 @@ cpu7: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "spin-table";
+ cpu-release-addr = /bits/ 64 <0>;
reg = <0x3>;
next-level-cache = <&l2_0>;
qcom,acc = <&acc7>;
--
2.47.2
