Hi Krzysztof,
Thank you for the review.
On Mon, Mar 31, 2025 at 9:26 AM Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote:
>
> On Sun, Mar 30, 2025 at 10:07:02PM +0100, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > The MIPI DSI interface on the RZ/V2H(P) SoC is nearly identical to that of
> > the RZ/G2L SoC. While the LINK registers are the same for both SoCs, the
> > D-PHY registers differ. Additionally, the number of resets for DSI on
> > RZ/V2H(P) is two compared to three on the RZ/G2L.
> >
> > To accommodate these differences, a SoC-specific
> > `renesas,r9a09g057-mipi-dsi` compatible string has been added for the
> > RZ/V2H(P) SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > .../bindings/display/bridge/renesas,dsi.yaml | 117 +++++++++++++-----
> > 1 file changed, 87 insertions(+), 30 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> > index e08c24633926..501239f7adab 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> > @@ -14,16 +14,16 @@ description: |
> > RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
> > up to four data lanes.
> >
> > -allOf:
> > - - $ref: /schemas/display/dsi-controller.yaml#
> > -
> > properties:
> > compatible:
> > - items:
> > - - enum:
> > - - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
> > - - renesas,r9a07g054-mipi-dsi # RZ/V2L
> > - - const: renesas,rzg2l-mipi-dsi
> > + oneOf:
> > + - items:
> > + - enum:
> > + - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
> > + - renesas,r9a07g054-mipi-dsi # RZ/V2L
> > + - const: renesas,rzg2l-mipi-dsi
> > +
> > + - const: renesas,r9a09g057-mipi-dsi # RZ/V2H(P)
>
> I guess this will grow, so just use enum here. Otherwise people keep
> adding const every time they add new model.
>
Agreed, I will add it as an enum here as RZ/V2N will follow this where
the IP blocks are identical.
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>
Cheers,
Prabhakar
