RE: [PATCH 4/4] clk: renesas: r9a09g047: Add XSPI clock/reset

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Hi Geert,

Thanks for the feedback.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: 06 March 2025 14:44
> Subject: Re: [PATCH 4/4] clk: renesas: r9a09g047: Add XSPI clock/reset
> 
> Hi Biju,
> 
> On Mon, 3 Mar 2025 at 12:04, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> >
> > Add XSPI clock and reset entries.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> 
> Thanks for your patch!
> 
> > --- a/drivers/clk/renesas/rzv2h-cpg.h
> > +++ b/drivers/clk/renesas/rzv2h-cpg.h
> > @@ -68,6 +68,7 @@ struct smuxed {
> >  #define CPG_CDDIV4             (0x410)
> >  #define CPG_CSDIV0             (0x500)
> >
> > +#define CDDIV0_DIVCTL1 DDIV_PACK(CPG_CDDIV0, 4, 3, 1)
> >  #define CDDIV0_DIVCTL2 DDIV_PACK(CPG_CDDIV0, 8, 3, 2)  #define
> > CDDIV1_DIVCTL0 DDIV_PACK(CPG_CDDIV1, 0, 2, 4)  #define CDDIV1_DIVCTL1
> > DDIV_PACK(CPG_CDDIV1, 4, 2, 5)
> 
> This hunk is already queued as part of commit 4d6952981244d1e4
> ("clk: renesas: r9a09g057: Add entries for the DMACs") in renesas-clk-for-v6.15.

OK will drop it in next version.

Cheers,
Biju




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