Hi Geert,
Thank you for the review.
On Mon, Aug 18, 2025 at 11:01 AM Geert Uytterhoeven
<geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Mon, 4 Aug 2025 at 21:57, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Extend the Renesas WDT device tree bindings to support the watchdog timer
> > found on the RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs.
> >
> > The RZ/T2H WDT is mostly compatible with the one found on the RZ/V2H(P),
> > but includes an additional register and differs in the clock division
> > ratio settings for the WDTCR[CKS] field. To reflect these differences,
> > introduce a new compatible string, "renesas,r9a09g077-wdt".
> >
> > The binding schema is updated accordingly. On RZ/T2H, the WDT does not
> > require the "resets" property. It also requires two register regions and
> > the presence of a "power-domains" property. The "clock-names" property is
> > limited to a single entry, "pclk", for this SoC.
> >
> > The RZ/N2H SoC uses the same WDT IP as the RZ/T2H. It is supported by
> > using "renesas,r9a09g087-wdt" as the primary compatible string, with
> > "renesas,r9a09g077-wdt" listed as a fallback to describe the shared
> > hardware features.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> > +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> > @@ -81,10 +81,17 @@ properties:
> > - renesas,r9a09g056-wdt # RZ/V2N
> > - const: renesas,r9a09g057-wdt # RZ/V2H(P)
> >
> > - - const: renesas,r9a09g057-wdt # RZ/V2H(P)
> > + - enum:
> > + - renesas,r9a09g057-wdt # RZ/V2H(P)
> > + - renesas,r9a09g077-wdt # RZ/T2H
> > +
> > + - items:
> > + - const: renesas,r9a09g087-wdt # RZ/N2H
> > + - const: renesas,r9a09g077-wdt # RZ/T2H
> >
> > reg:
> > - maxItems: 1
> > + minItems: 1
> > + maxItems: 2
>
> The second register block is just a single register, right?
Yes, the second register block is just a single register.
> Showing an (early) example of the device node would make such
> details easier to notice...
>
Ok, I'll update the commit message to include an example node for clarity.
Cheers,
Prabhakar
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
