From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Enable USB support (host, device, USB PHYs).
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
---
Changes in v5:
- none
Changes in v4:
- none
Changes in v3:
- collected tags
Changes in v2:
- this was patch 15/16 in v1:
- dropped sysc enablement as it is now done in SoC dtsi file
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 57 ++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
index 5e044a4d0234..5586dd43c4d5 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
@@ -92,6 +92,20 @@ &audio_clk2 {
clock-frequency = <12288000>;
};
+&ehci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hsusb {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -132,6 +146,15 @@ power-monitor@44 {
};
};
+&ohci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
&pinctrl {
audio_clock_pins: audio-clock {
pins = "AUDIO_CLK1", "AUDIO_CLK2";
@@ -207,6 +230,27 @@ ssi3_pins: ssi3 {
<RZG2L_PORT_PINMUX(18, 4, 8)>, /* TXD */
<RZG2L_PORT_PINMUX(18, 5, 8)>; /* RXD */
};
+
+ usb0_pins: usb0 {
+ peri {
+ pinmux = <RZG2L_PORT_PINMUX(5, 0, 1)>, /* VBUS */
+ <RZG2L_PORT_PINMUX(5, 2, 1)>; /* OVC */
+ };
+
+ otg {
+ pinmux = <RZG2L_PORT_PINMUX(5, 3, 1)>; /* OTG_ID */
+ bias-pull-up;
+ };
+ };
+
+ usb1_pins: usb1 {
+ pinmux = <RZG2L_PORT_PINMUX(5, 4, 5)>, /* OVC */
+ <RZG2L_PORT_PINMUX(6, 0, 1)>; /* VBUS */
+ };
+};
+
+&phyrst {
+ status = "okay";
};
&scif0 {
@@ -242,3 +286,16 @@ &ssi3 {
pinctrl-0 = <&ssi3_pins>, <&audio_clock_pins>;
status = "okay";
};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.43.0
