From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Enable eMMC on RZ/T2H and RZ/N2H EVKs. As SDHI0 can be connected to either eMMC0/SD0 `SD0_EMMC` macro is added. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> --- v1->v2: - Added comment regarding DSW17 settings - Dropped sd0-emmc-prefixes --- .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 9 +++ .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 10 +++ .../dts/renesas/rzt2h-n2h-evk-common.dtsi | 62 +++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index a7b91c96f311..cb659b2a4337 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -8,6 +8,15 @@ /dts-v1/; #include "r9a09g077m44.dtsi" + +/* + * SD0 can be connected to either eMMC (IC49) or SD card slot CN31 + * Lets by default enable the eMMC, note we need the below SW settings + * for eMMC. + * SW2[1] = ON; SW2[2] = ON + */ +#define SD0_EMMC 1 + #include "rzt2h-n2h-evk-common.dtsi" / { diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index a068661fc442..87e362f6f09f 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -8,6 +8,16 @@ /dts-v1/; #include "r9a09g087m44.dtsi" + +/* + * SD0 can be connected to either eMMC (U33) or SD card slot CN21 + * Lets by default enable the eMMC, note we need the below SW settings + * for eMMC. + * DSW5[1] = ON; DSW5[2] = ON + * DSW17[5] = OFF; DSW17[6] = ON + */ +#define SD0_EMMC 1 + #include "rzt2h-n2h-evk-common.dtsi" /* diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index 1b7e16ffe6b6..68d493bf5e8c 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -13,12 +13,31 @@ / { aliases { i2c0 = &i2c0; i2c1 = &i2c1; + mmc0 = &sdhi0; serial0 = &sci0; }; chosen { stdout-path = "serial0:115200n8"; }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; }; &extal_clk { @@ -46,6 +65,34 @@ sci0_pins: sci0-pins { pinmux = <RZT2H_PORT_PINMUX(27, 4, 0x14)>, <RZT2H_PORT_PINMUX(27, 5, 0x14)>; }; + +#if SD0_EMMC + sdhi0-emmc-iovs-hog { + gpio-hog; + gpios = <RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SD0_IOVS"; + }; +#endif + + sdhi0_emmc_pins: sd0-emmc-group { + data-pins { + pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */ + <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */ + <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */ + <RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */ + <RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */ + <RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */ + <RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */ + <RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */ + }; + + ctrl-pins { + pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */ + <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */ + <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */ + }; + }; }; &sci0 { @@ -53,3 +100,18 @@ &sci0 { pinctrl-names = "default"; status = "okay"; }; + +#if SD0_EMMC +&sdhi0 { + pinctrl-0 = <&sdhi0_emmc_pins>; + pinctrl-1 = <&sdhi0_emmc_pins>; + pinctrl-names = "default", "state_uhs"; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + non-removable; + mmc-hs200-1_8v; + fixed-emmc-driver-type = <1>; + status = "okay"; +}; +#endif -- 2.51.0