According to the RZ/V2H (Rev.1.01) and RZ/G3E (Rev.1.10) documentation,
the Schmitt Control Registers are located at offset 0x3500.
Fixes: 725933a54f718af5 ("pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger")
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
Untested due to lack of hardware.
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 79c7792c2f549dab..52a61901aef0f191 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -142,7 +142,7 @@
#define PUPD(off) (0x1C00 + (off) * 8)
#define ISEL(off) (0x2C00 + (off) * 8)
#define NOD(off) (0x3000 + (off) * 8)
-#define SMT(off) (0x3400 + (off) * 8)
+#define SMT(off) (0x3500 + (off) * 8)
#define SD_CH(off, ch) ((off) + (ch) * 4)
#define ETH_POC(off, ch) ((off) + (ch) * 4)
#define QSPI (0x3008)
--
2.43.0
