>
>> DEF_MOD("canfd", R9A07G044_CANFD_PCLK, R9A07G044_CLK_P0,
>> - 0x594, 0, 0),
>> + 0x594, 0, MSTOP(BUS_MCPU2, BIT(9))),
>> DEF_MOD("gpio", R9A07G044_GPIO_HCLK, R9A07G044_OSCCLK,
>> 0x598, 0, 0),
>
> "MSTOP(BUS_PERI_CPU, BIT(6))"?
That was a good catch, thank you!
I played with it at runtime and it seems it should be here. It is not
present in table "Table 42.3 Registers for Module Standby Mode" either. It
is also valid for RZ/G3S so I'll add it there, too.
Thank you for your review,
Claudiu
>
>> DEF_MOD("adc_adclk", R9A07G044_ADC_ADCLK, R9A07G044_CLK_TSU,
>> - 0x5a8, 0, 0),
>> + 0x5a8, 0, MSTOP(BUS_MCPU2, BIT(14))),
>
>
> The rest LGTM.
>
> Gr{oetje,eeting}s,
>
> Geert
>
