On Tue, Jul 29, 2025 at 04:59:11PM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Add support for selecting the count clock source used by the watchdog > timer. The RZ/V2H(P) SoC uses the LOCO as the count source, whereas on > RZ/T2H and RZ/N2H SoCs, the count source is the peripheral clock (PCLKL). > > Introduce a `count_source` field in the SoC-specific data structure and > refactor the clock rate selection logic accordingly. This prepares the > driver for supporting the RZ/T2H and RZ/N2H SoCs, which differ in their > watchdog clocking architecture from RZ/V2H(P). > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Reviewed-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
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