[PATCH] arm64: dts: renesas: rzg3e-smarc-som: Fix I2C bus for PMIC control

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

As per the hardware manual, RIIC8 is located in PD_AWO domain and we must
use that bus for PMIC control. Currently wrong i2c bus (i2c2) is used for
the PMIC control and the system is not entering into suspend mode because
of this.

Fixes: f7a98e256ee30 ("arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol")
Fixes: 5ecd5a8261d00 ("arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support")
Fixes: f62bb41740462 ("arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency")
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
 arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index 7faa44510d98..52eda41a6102 100644
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -28,7 +28,7 @@ / {
 	aliases {
 		ethernet0 = &eth0;
 		ethernet1 = &eth1;
-		i2c2 = &i2c2;
+		i2c8 = &i2c8;
 		mmc0 = &sdhi0;
 		mmc2 = &sdhi2;
 	};
@@ -102,8 +102,8 @@ &gpu {
 	mali-supply = <&reg_vdd0p8v_others>;
 };
 
-&i2c2 {
-	pinctrl-0 = <&i2c2_pins>;
+&i2c8 {
+	pinctrl-0 = <&i2c8_pins>;
 	pinctrl-names = "default";
 	clock-frequency = <400000>;
 	status = "okay";
@@ -214,9 +214,9 @@ ctrl {
 		};
 	};
 
-	i2c2_pins: i2c {
-		pinmux = <RZG3E_PORT_PINMUX(3, 4, 1)>, /* SCL2 */
-			 <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */
+	i2c8_pins: i2c8 {
+		pinmux = <RZG3E_PORT_PINMUX(3, 4, 4)>, /* SCL8 */
+			 <RZG3E_PORT_PINMUX(3, 5, 4)>; /* SDA8 */
 	};
 
 	rtc_irq_pin: rtc-irq {
-- 
2.43.0