Hi Geert,
Thank you for the review.
On Wed, Jul 2, 2025 at 2:46 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Wed, 25 Jun 2025 at 16:17, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Add RIIC module clocks for: iic0, iic1, and iic2.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r9a09g077-cpg.c
> > +++ b/drivers/clk/renesas/r9a09g077-cpg.c
> > @@ -154,6 +154,9 @@ static const struct cpg_core_clk r9a09g077_core_clks[] __initconst = {
> >
> > static const struct mssr_mod_clk r9a09g077_mod_clks[] __initconst = {
> > DEF_MOD("sci0fck", 8, CLK_SCI0ASYNC),
> > + DEF_MOD("iic0", 100, R9A09G077_CLK_PCLKL),
> > + DEF_MOD("iic1", 101, R9A09G077_CLK_PCLKL),
> > + DEF_MOD("iic2", 501, R9A09G077_CLK_PCLKL),
>
> Shouldn't that be 601?
> (MSTPCRA => xx, MSTPCRB => 1xx, MSTPCRG => 6xx)
> If you agree, I can fix that while applying...
>
Agreed, thank you for taking care of it.
Cheers,
Prabhakar
> > DEF_MOD("sdhi0", 1212, R9A09G077_CLK_PCLKAM),
> > DEF_MOD("sdhi1", 1213, R9A09G077_CLK_PCLKAM),
> > };
>
> The rest LGTM, so with the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
