[PATCH] Update r7s72100 Genmai DTS to include NOR Flash pinctrl

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



From: Magnus Damm <damm@xxxxxxxxxxxxx>

Add pinctrl configuration to the Genmai board for the NOR Flash on CS0 and CS1.

Signed-off-by: Magnus Damm <damm@xxxxxxxxxxxxx>
---

 arch/arm/boot/dts/renesas/r7s72100-genmai.dts |   52 +++++++++++++++++++++++++
 1 file changed, 52 insertions(+)
 
--- 0001/arch/arm/boot/dts/renesas/r7s72100-genmai.dts
+++ work/arch/arm/boot/dts/renesas/r7s72100-genmai.dts	2025-06-28 17:10:55.537223414 +0900
@@ -99,6 +99,9 @@
 };
 
 &bsc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&bsc_pins>;
+
 	flash@0 {
 		compatible = "cfi-flash";
 		reg = <0x00000000 0x04000000>;
@@ -211,6 +214,55 @@
 };
 
 &pinctrl {
+	bsc_pins: bsc {
+		/* Dual 16-bit Parallel NOR Flash in Serial on CS0 and CS1 */
+		pinmux = <RZA1_PINMUX(6, 0, 1)>, /* P6_0 = D0 */
+			 <RZA1_PINMUX(6, 1, 1)>, /* P6_1 = D1 */
+			 <RZA1_PINMUX(6, 2, 1)>, /* P6_2 = D2 */
+			 <RZA1_PINMUX(6, 3, 1)>, /* P6_3 = D3 */
+			 <RZA1_PINMUX(6, 4, 1)>, /* P6_4 = D4 */
+			 <RZA1_PINMUX(6, 5, 1)>, /* P6_5 = D5 */
+			 <RZA1_PINMUX(6, 6, 1)>, /* P6_6 = D6 */
+			 <RZA1_PINMUX(6, 7, 1)>, /* P6_7 = D7 */
+			 <RZA1_PINMUX(6, 8, 1)>, /* P6_8 = D8 */
+			 <RZA1_PINMUX(6, 9, 1)>, /* P6_9 = D9 */
+			 <RZA1_PINMUX(6, 10, 1)>, /* P6_10 = D10 */
+			 <RZA1_PINMUX(6, 11, 1)>, /* P6_11 = D11 */
+			 <RZA1_PINMUX(6, 12, 1)>, /* P6_12 = D12 */
+			 <RZA1_PINMUX(6, 13, 1)>, /* P6_13 = D13 */
+			 <RZA1_PINMUX(6, 14, 1)>, /* P6_14 = D14 */
+			 <RZA1_PINMUX(6, 15, 1)>, /* P6_15 = D15 */
+			 <RZA1_PINMUX(7, 9, 1)>, /* P7_9 = A1 */
+			 <RZA1_PINMUX(7, 10, 1)>, /* P7_10 = A2 */
+			 <RZA1_PINMUX(7, 11, 1)>, /* P7_11 = A3 */
+			 <RZA1_PINMUX(7, 12, 1)>, /* P7_12 = A4 */
+			 <RZA1_PINMUX(7, 13, 1)>, /* P7_13 = A5 */
+			 <RZA1_PINMUX(7, 14, 1)>, /* P7_14 = A6 */
+			 <RZA1_PINMUX(7, 15, 1)>, /* P7_15 = A7 */
+			 <RZA1_PINMUX(8, 0, 1)>, /* P8_0 = A8 */
+			 <RZA1_PINMUX(8, 1, 1)>, /* P8_1 = A9 */
+			 <RZA1_PINMUX(8, 2, 1)>, /* P8_2 = A10 */
+			 <RZA1_PINMUX(8, 3, 1)>, /* P8_3 = A11 */
+			 <RZA1_PINMUX(8, 4, 1)>, /* P8_4 = A12 */
+			 <RZA1_PINMUX(8, 5, 1)>, /* P8_5 = A13 */
+			 <RZA1_PINMUX(8, 6, 1)>, /* P8_6 = A14 */
+			 <RZA1_PINMUX(8, 7, 1)>, /* P8_7 = A15 */
+			 <RZA1_PINMUX(8, 8, 1)>, /* P8_8 = A16 */
+			 <RZA1_PINMUX(8, 9, 1)>, /* P8_9 = A17 */
+			 <RZA1_PINMUX(8, 10, 1)>, /* P8_10 = A18 */
+			 <RZA1_PINMUX(8, 11, 1)>, /* P8_11 = A19 */
+			 <RZA1_PINMUX(8, 12, 1)>, /* P8_12 = A20 */
+			 <RZA1_PINMUX(8, 13, 1)>, /* P8_13 = A21 */
+			 <RZA1_PINMUX(8, 14, 1)>, /* P8_14 = A22 */
+			 <RZA1_PINMUX(8, 15, 1)>, /* P8_15 = A23 */
+			 <RZA1_PINMUX(9, 0, 1)>, /* P9_0 = A24 */
+			 <RZA1_PINMUX(9, 1, 1)>, /* P9_1 = A25 */
+			 <RZA1_PINMUX(7, 6, 1)>, /* P7_6 = WE0/DQMLL */
+			 <RZA1_PINMUX(7, 8, 1)>, /* P7_8 = RD */
+			 <RZA1_PINMUX(7, 0, 1)>, /* P7_0 = CS0 */
+			 <RZA1_PINMUX(3, 7, 7)>; /* P7_8 = CS1 */
+	};
+
 	ether_pins: ether {
 		/* Ethernet on Ports 1,2,3,5 */
 		pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL  */




[Index of Archives]     [Linux Samsung SOC]     [Linux Wireless]     [Linux Kernel]     [ATH6KL]     [Linux Bluetooth]     [Linux Netdev]     [Kernel Newbies]     [IDE]     [Security]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Linux ATA RAID]     [Samba]     [Device Mapper]

  Powered by Linux