Hi Prabhakar, On Tue, 17 Jun 2025 at 19:20, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > This patch series adds initial support for the Renesas RZ/N2H SoC and > the RZ/N2H Evaluation Board (EVK). The series includes: > 1. An initial SoC DTSI for the RZ/N2H SoC, which includes the basic > configuration of the SoC blocks such as EXT CLKs, 4X CA55, SCIF, > CPG, GIC, and ARMv8 Timer. > 2. A new DTSI for the R9A09G087M44 variant of the RZ/N2H SoC, which > features a 4-core configuration. > 3. Refactoring of the RZ/T2H EVK device tree to extract common entries > into a new file, `rzt2h-n2h-evk-common.dtsi`, to reduce > duplication between the RZ/T2H and RZ/N2H EVK device trees. > 4. An initial device tree for the RZ/N2H EVK, which includes > the common entries from the previous step and sets up the board > model and compatible strings. > > Note, > - I've split up this patch from original series [1] to make it easier > to review and apply. > - This patch series applied on top of the series [2]. > > [1] https://lore.kernel.org/all/20250609203656.333138-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ > [2] https://lore.kernel.org/all/20250617162810.154332-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ > > v1->v2: > - Reordered the `l3_ca55` node and renamed it to `L3_CA55` for consistency > - Renamed the file to `rzt2h-n2h-evk-common.dtsi` to better reflect its > purpose. > - Updated model string to "Renesas RZ/N2H EVK Board based on r9a09g087m44" > - Added reviewed-by tag from Geert Thank you, both [2] and this series are good to go, once the updated renesas,rsci DT bindings are accepted. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
