Hi Prabhakar,
On Fri, 13 Jun 2025 at 17:38, Lad, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
>
> Hi Geert,
>
> Thank you for the review.
>
> On Thu, Jun 12, 2025 at 4:47 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> >
> > Hi Prabhakar,
> >
> > On Tue, 10 Jun 2025 at 01:23, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > Add SDHI bindings for the Renesas RZ/T2H (a.k.a R9A09G077) and RZ/N2H
> > > (a.k.a R9A09G087) SoCs. Use `renesas,sdhi-r9a09g057` as a fallback since
> > > the SD/MMC block on these SoCs is identical to the one on RZ/V2H(P),
> > > allowing reuse of the existing driver without modifications.
> > >
> > > Update the binding schema to reflect differences: unlike RZ/V2H(P),
> > > RZ/T2H and RZ/N2H do not require the `resets` property and use only a
> > > single clock instead of four.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Thanks for your patch!
> >
> > > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> > > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> > > @@ -129,59 +131,75 @@ allOf:
> > > compatible:
> > > contains:
> > > enum:
> > > - - renesas,sdhi-r9a09g057
> > > - - renesas,rzg2l-sdhi
> > > + - renesas,sdhi-r9a09g077
> > > + - renesas,sdhi-r9a09g087
> > > then:
> > > properties:
> > > + resets: false
> > > clocks:
> > > - items:
> > > - - description: IMCLK, SDHI channel main clock1.
> > > - - description: CLK_HS, SDHI channel High speed clock which operates
> > > - 4 times that of SDHI channel main clock1.
> > > - - description: IMCLK2, SDHI channel main clock2. When this clock is
> > > - turned off, external SD card detection cannot be
> > > - detected.
> > > - - description: ACLK, SDHI channel bus clock.
> > > + description: ACLK, SDHI channel bus clock.
> >
> > According to the documentation, this is the SDHI high speed clock...
> >
> Agreed, I will update it to `CLKHS, SDHI channel High speed clock.`
>
> > > + maxItems: 1
> > > clock-names:
> > > - items:
> > > - - const: core
> > > - - const: clkh
> > > - - const: cd
> > > - - const: aclk
> > > - required:
> > > - - clock-names
> > > - - resets
> > > + const: aclk
> >
> > ... i.e. clkhs.
> s/clkhs/clkh
The documentation calls it "clkhs".
In addition, calling it "clkh" may confuse the driver if it turns out to be
identical to the main (first, unnamed) clock:
priv->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(priv->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),
"cannot get clock");
priv->clkh = devm_clk_get_optional(&pdev->dev, "clkh");
if (IS_ERR(priv->clkh))
return dev_err_probe(&pdev->dev, PTR_ERR(priv->clkh),
"cannot get clkh");
...
if (priv->clkh) {
/* HS400 with 4TAP needs different clock settings */
...
}
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
